Obviously, in today's high availability multiple processing systems it is desirable to avoid the occurrence of unplanned downtime. Designers of large multiprocessing systems improve the availability of such systems by providing for continuous operation through parallel maintenance. This operation is referred to in the art as "concurrent maintenance." The ability to upgrade the system through mechanical rework in situ while causing no more than a brief interruption in the customer's need for continuous operation is an important marketing advantage of certain large multiprocessor systems. A prerequisite to implementation of a concurrent maintenance scheme, however, is the construction of a viable fencing technique. Fencing is used, for example, by system designers to block logic signals and logic noise at interfaces to be partitioned during a concurrent maintenance operation.
The object of any fencing technique is to isolate spurious noise (such as triboelectric charge occurring on a signal cable) from being transferred to an active system interface. By way of example, interfaces exist in most systems where signal cables interconnect I/O devices, such as keyboards and display terminals. Also, they exist internally to computer processing systems, for example, between chips and modules of the same processing element, or of a different processing element in a multiprocessor system.
As one possible approach to reducing the effects of spurious noise, significant effort has been expended in the art to designing signal cables which reduce or eliminate the buildup of electrostatic charge thereon. However, such a solution is often expensive and only addresses one type of spurious noise, i.e., triboelectric charge. (The static charge imbalance on a signal cable is satisfied when the signal and ground leads first make contact to a conductive source, e.g., an active computer system interface.)
Spurious noise can result in a current surge which in certain cases is sufficient to drive through a conventionally fenced receiver circuit and cause interruptions to the active portion of the computer processing system. This significant conclusion has only just now been reached after significant hours of studying processing systems in physical partition mode (again, for conducting system maintenance or upgrading). Specifically, notwithstanding the existence of conventional logic fencing at system interfaces, certain types of spurious noise (such as static discharges) continue to intermittently drive through the traditional fencing logic protection and cause errors to occur within an active portion of the multiprocessor system.
Thus, the present invention attempts to address this surprising source of system errors (i.e., the intermittent breakdown of conventional fencing circuitry) and in so doing enhance continuous operation of a multiprocessor system during maintenance periods and/or model upgrades. Without a viable fencing design, many of the error recovery and error isolation techniques used by system designers become virtually impossible to implement. If fencing is not reliable, status and error information cannot be acted upon with predictable results.